Show Bid Request
simple verilog program
Bid Request Id: 69579
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Posted by: |
GACHE (9 ratings)
(Software buyer rating 10)
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Non-action Ratio: |
Above Average - 40.00%
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Posted: |
Jun 22, 2003 6:48:34 AM EDT
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Bidding Closes: |
Jun 24, 2003 EDT
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Viewed (by coders): |
115 times
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Deadline: |
6/24/2003
TIME EXPIRED
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Description:
I have 2 verilog programs listed below that i cannot get to run/simulate and give me an output. I just need someone to run them and if there is an error, fix the error until you get and output. Then send me the copy of each of the 2 programs below and their outputs.
PROGRAM #1 module binary ToESeg (output eSeg, input A,B,C,D); nand #1 g1(p1,C,~D), g2(p2,A,B), g3(p3,~B,~D), g4(p4,A,C), g5(eSeg,p1,p2,p3,p4); endmodule
module m16 (output reg[3:0] ctr=1, input clock); always at(posedge clock) ctr <=ctr+1; endmodule
module m555 (output reg clock); initial #5 clock=1; always #50 clock=~clock; endmodule
module board; wire [3:0] count; wire clock, eSeg; m16 counter (count, clock); m555 clockGen (clock); binaryToESeg disp (eSeg, count[3], count[2], count[1], count[0]);
initial $monitor($time,,,"count=%d, eSeg=%d", count, eSeg); endmodule
PROGRAM #2
module binary ToESeg (output eSeg, input A,B,C,D); nand #1 g1(p1,C,~D), g2(p2,A,B), g3(p3,~B,~D), g4(p4,A,C), g5(eSeg,p1,p2,p3,p4); endmodule
module m16 (value, clock, Fifteen, altFifteen); output [3:0] value; output Fifteen, altFifteen; input clock; dEdgeFF a(value [0], clock, ~value[0]), b(value [1], clock, value[1]^value[0]), c(value [2], clock, value[2]^&value[1:0]), d(value [3], clock, value[3]^&value[2:0]); assign Fifteen = value[0] &value[1] &value[2] &value[3]; assign altFifteen = &value; endmoudle
module dEdgeFF (q, clock, data); output q; reg q; input clock, data; initial q=0; always at(negedge clock) #10 q= data; endmodule
module m555 (output reg clock); initial #5 clock=1; always #50 clock=~clock; endmodule
module board; wire [3:0] count; wire clock, eSeg;
dEdgeFF Fl (q, clock, data); m16 counter (count, clock); m555 clockGen (clock); binaryToESeg disp (eSeg, count[3], count[2], count[1], count[0]);
initial $monitor($time,,,"count=%d, f=%d, af=%d, eSeg=%d", count, f, af, eSeg);
endmodule
Deliverables: 1) Complete and fully-functional working program(s) in executable form as well as complete source code of all work done.
2) Installation package that will install the software (in ready-to-run condition) on the platform(s) specified in this bid request.
3) Complete ownership and distribution copyrights to all work purchased.
Platform:
any platform as long as you give me an output for both programs, especially the 2nd one.
Must be 100% finished and received by buyer on:
Jun 24, 2003 EDT
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Bidding/Comments:
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Name |
Bid Amount |
Date |
Coder Rating |
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This bid was accepted by the buyer!
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$5 (USD)
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Jun 22, 2003 8:06:46 PM EDT
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10
(Excellent)
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Hi GACHE,
I had seen your bid request and i removed the errors in the 2 programs. I am sending the Source code and the outputs of the two programs. i had compiled and run the programs in 'ModelSim XE/Starter 5.5e_p1'.
Please let me know if this is the required output you want or if its not working in any other platform(i guess it will work on all tools). i am bidding at $5 please accept my work and give me a good rating so that its possible for me to get future projects.
I also want to know that i am an Electrical Engineer, so i have good knowledge in all EDA and other simulation tools. i look forward to work more with you.
waiting for your reply,
Best Regards,
CommEngineer.
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Attached File
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